鐮旂ゥATX绲�(ji茅)妲�(g貌u) 鍠澘闆昏叇 EC0-1816V2NA锛圔锛�

銆愯硣鏂欑啊(ji菐n)浠嬨€�

鈼� 鏀寔Ivy Bridge/Sandy Bridge LGA1155闆欐牳/鍥涙牳铏曠悊鍣�
鈼� 鏀寔1333/1066MHz DDR3鍏�(n猫i)瀛�锛寊ui澶у収(n猫i)瀛樺閲忓彲閬�(d谩)16GB
鈼� VGA+DVI-D椤ず鍔熻兘
鈼� 鏀寔10鍊�(g猫)USB2.0,4鍊�(g猫)USB3.0锛�10鍊�(g猫)涓插彛
鈼� 鏀寔PCIe X16銆丳CIe X1, PCI绺界窔(xi脿n)鎿�(ku貌)灞�

姒� 杩�
EC0-1816V2NA(B)鏄熀浜嶪n® H61鑺墖绲勯枊(k膩i)鐧�(f膩)鐨凙TX绲�(ji茅)妲�(g貌u)鍠澘闆昏叇锛屽吋瀹笽vy Bridge/Sandy Bridge LGA1155闆欐牳/鍥涙牳铏曠悊鍣紱鏀寔VGA+DVI-D椤ず鍔熻兘锛涙敮鎸丳CIe X16銆丳CIe X1, PCI绺界窔(xi脿n)鎿�(ku貌)灞�锛屼富瑕侀嚌灏�(du矛)宸ユキ(y猫)鑷嫊(d貌ng)鍖�銆佺挵(hu谩n)淇濇娓�(c猫)绛夋噳(y墨ng)鐢�锛岀殑鎬ц兘鍜岃睈瀵岀殑鍔熻兘閰嶇疆鍙互鐧�(f膩)鎻噸瑕佷綔鐢�銆�
鐢�(ch菐n)鍝佽(gu墨)鏍艰▊璩�(g貌u)淇℃伅璩囨枡涓績
铏曠悊鍣細    
鏀寔Ivy Bridge/Sandy Bridge 鏍稿績 LGA1155闆欐牳/鍥涙牳铏曠悊鍣�
鑺墖绲勶細    
H61 鑺墖绲�
鍏�(n猫i)瀛橈細    
鎻愪緵2姊�240Pin妯�(bi膩o)婧�(zh菙n)DDR III 1066/1333MHz  DIMM鍏�(n猫i)瀛樻彃妲斤紝鏀寔鍠牴鍏�(n猫i)瀛榸ui澶у閲�8GB锛岀附鏀寔16GB
椤ず鎺ュ彛锛�    
鏀寔VGA+DVI-D鏅�(sh铆)锛孷GA1锛�2048×1536锛孌VI-D锛�1920×1200
闊抽牷锛�    
閲囩敤HDA妯�(bi膩o)婧�(zh菙n)锛屾敮鎸丮IC-IN/LINE-IN/LINE-OUT
LAN锛�    
鎻愪緵2鍊�(g猫)10/100/1000Mbps缍�(w菐ng)绲�(lu貌)鎺ュ彛
瀛樺劜(ch菙)鍣細    
鎻愪緵4鍊�(g猫)SATA 2.0鎺ュ彛
I/O鎺ュ彛锛�    
鎻愪緵10鍊�(g猫)涓插彛锛屽叾涓瑿OM1,COM2  鏀寔RS-232/422/RS-485妯″紡閬告搰锛涙彁渚� 10鍊�(g猫)USB2.0鎺ュ彛锛涙彁渚�4鍊�(g猫)USB3.0鎺ュ彛(鍏煎USB2.0)锛涙彁渚�1鍊�(g猫)8璺暩(sh霉)瀛桰/O鎺ュ彛锛涙彁渚�1鍊�(g猫)TPM/TCM鎺ュ彛锛�1鍊�(g猫)LPT鎺ュ彛锛堟彃閲濇帴鍙ｏ紝鍙€氶亷(gu貌)绶�(xi脿n)鏉愬紩鍑猴級
鎿�(ku貌)灞曠附绶�(xi脿n)锛�    
5鍊�(g猫)PCI銆�1鍊�(g猫)PCI_Ex16銆�1鍊�(g猫)PCI_Ex4(瀵�(sh铆)闅涢€熷害鐐篜CI_Ex1)
宸ヤ綔鐠�(hu谩n)澧冿細    
-10鈩冿綖60鈩冿紱婵曞害锛�5%锝�95%锛堥潪鍑濈祼(ji茅)鐙€鎱�(t脿i)锛�
鍎�(ch菙)瀛樼挵(hu谩n)澧冿細    
-20鈩冿綖80鈩�锛涙繒搴︼細5%锝�95%锛堥潪鍑濈祼(ji茅)鐙€鎱�(t脿i)锛�
鐪嬮杸(m茅n)鐙楋細    
255绱�(j铆)锛屽彲绶ㄧ▼绉�/鍒�锛岃秴鏅�(sh铆)涓柗鎴栫郴绲�(t菕ng)寰�(f霉)浣�
闆绘簮锛�    
閲囩敤妯�(bi膩o)婧�(zh菙n)ATX闆绘簮渚涢浕
灏哄锛圵×D锛夛細    
304.8 mm锛堥暦(zh菐ng)锛�× 251.2 mm锛堝锛�

鏅跺壍(chu脿ng)瓒婁笘绉戞妧锛堝寳浜級鏈夐檺鍏徃涓荤嚐(y铆ng)锛氱爺鑿伐鎺ф(j墨)锛屼笁鑿辨恫鏅跺睆锛屼笁鑿遍櫧(y谩ng)鍏変笅鍙娑叉櫠灞�锛屼笁鑿盠ED鑳屽厜娑叉櫠灞忥紝涓夎彵瀵韩娑叉櫠灞忥紝鐮旇彲ADAM妯″锛岀爺鑿竴楂斿寲宸ヤ綔绔�锛岀爺鑿澘鍗�锛岀爺鑿噰闆嗗崱锛岀爺鑿究鏀滃紡宸ユ帶姗�(j墨)锛岀爺绁ュ伐鎺ф(j墨)锛岀爺鑿祵鍏ュ紡宸ユ帶姗�(j墨)锛岀爺鑿劇(w煤)棰�(f膿ng)鎵囧伐鎺ф(j墨)锛屾澗涓嬪姞鍥虹瓎瑷樻湰鍏ㄧ郴鍒�锛孏ETAC鍔犲浐绛嗚鏈紝娓呰彲鍚屾柟鍔犲浐绛嗚鏈�锛孏creat鑷富鍝佺墝宸ユ帶姗�(j墨)鍏ㄧ郴鍒�锛孏creat宓屽叆寮忕劇(w煤)棰�(f膿ng)鎵囧伐鎺ф(j墨)锛孏creat骞虫澘闆昏叇锛孏creat涓€楂斿寲宸ヤ綔绔�锛孏creat宸ユキ(y猫)椤ず鍣ㄣ€�